Add Cache Line Writeback Instruction - #7253
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BradleyWood
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I have a few questions and comments.
Can you remove "Fixes" from your PR and commit message?
To check for instruction support, OMR must enable the OMR_FEATURE_X86_CLWB feature. If OpenJ9 wishes to use this opcode, it must also do so.
Can you add some binary encoding test cases?
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BradleyWood
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Have you tried calling supportsFeature(OMR_FEATURE_X86_CLWB)? I think supports_feature_test needs to know about it for now. I know its a bit annoying, but its required until we remove the old api.
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jenkins build all |
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Failures on windows are from infrastructure-related failures. MacOS tests failures are unrelated to this pull request, seem to be failing from #7181 |
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Minor nit: in your commit message, can you word wrap the line that begins "The intrinsic permits users to..." We don't need to re-run CI if that's all you change. Thanks. |
This commit adds the clwb instruction motivated by the writeback0 intrinsic available in the Unsafe Java library. The intrinsic permits users to write back a cache line if cache line writeback is enabled by the underlying VM. This instruction maps 1-1 with the intrinsic method. The CPUID feature flag OMR_FEATURE_X86_CLWB is already implemented and should be used to check whether the instruction is supported in the underlying hardware. To use this instruction, the caller should check if said feature flag is enabled for the cpu. Signed-off-by: James You <james.you@protonmail.com>
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Updated the commit message (only) |
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This commit adds the
clwbinstruction motivatedby the writeback0 intrinsic available in the Unsafe Java library.
The intrinsic permits users to write back a cache line if cache line writeback is enabled by the underlying VM. This instruction maps 1-1 with the intrinsic method.
The CPUID feature flag OMR_FEATURE_X86_CLWB is already implemented and should be used to check whether the instruction is supported in the underlying hardware.