Kill correct registers for VLM - #6748
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Account for vector registers when calculating real register to check if spill is needed after a load multiple instruction. Signed-off-by: Spencer Comin <spencer.comin@ibm.com>
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Relaunching build with the rebased changes to make sure nothing breaks |
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@0xdaryl Can you please review/merge this change? |
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Account for vector registers when calculating real register to check if spill is needed after a load multiple instruction. This fixes the behaviour of uneccessarily and incorrectly spilling GPRs when using VLM. An example of the error from my experience trying to accelerate crc32c on Z:
Here GPR7 and GPR6 are unnecessarily spilled since GPR5-GPR8 are incorrectly used in the check at [1] rather than VRF5-VRF8. This patch solves this problem.
[1] https://github.com/eclipse/omr/blob/f99c9dd2248e6ee35e40536b3c243eee33924407/compiler/z/codegen/OMRInstruction.cpp#L722